Hardware developer / FPGA

Le centre Inria Rennes - Bretagne Atlantique est un des huit centres d’Inria et compte plus d'une trentaine d’équipes de recherche. Le centre Inria est un acteur majeur et reconnu dans le domaine des sciences numériques. Il est au cœur d'un riche écosystème de R&D et d’innovation : PME fortement innovantes, grands groupes industriels, pôles de compétitivité, acteurs de la recherche et de l’enseignement supérieur, laboratoires d'excellence, institut de recherche technologique.

As part of the Arsene project (PEPR Cybersecurity), Inria Rennes is offering an engineer position (with or without a PhD) within the TARAN team, in collaboration with the High Security Laboratory (LHS) of Rennes and the PACAP team. The work will involve developing an FPGA demonstrator integrating the secure IPs developed within the project. This is a unique opportunity to work on a cutting-edge project in the field of computer security and the architecture of processors and embedded systems.

Host Team:
The project will take place within the TARAN team (formerly CAIRN) at the IRISA/INRIA laboratory. The TARAN team, which comprises more than 35 members from Inria, Univ Rennes, and ENS Rennes, has participated in numerous national and European R&D projects and has strong industrial partnerships (e.g., Safran, Thales, Nokia, Orange, STMicroelectronics, and various SMEs). TARAN has recognized expertise in several areas related to the project, such as computer architectures, embedded system design, fault tolerance, safety-critical systems, hardware accelerators, and computer arithmetic. In the context of hardware security, the team also works closely with DGA-MI and ANSSI.

The main mission will be to develop an FPGA demonstrator (Xilinx), integrating the secure IPs from the project. The goal is to build a System-on-Chip around a custom NaxRiscV out-of-order execution core tailored for security. This SoC must be capable of running Linux.

The secondary mission will be to improve and evolve the open-source tools required for the development of this SoC.

The position is open for 3 years.

• Design of the SoC IP from the adaptation of a collection of standalone IPs.
• Synthesis of the SoC and programming of the FPGA.
• Setting up the software environment (Linux) to test this SoC.
• Setting up experiments to test the security hardening present in the SoC.
• Writing technical documentation.
• Writing scientific papers based on the results obtained.

- Deep knowledge of processor and embedded system architectures
- Experience in hardware and software development (languages and methods)
- Experience in FPGA and/or ASIC development
- Good communication and team working skills
- Mastery of technical English (written and spoken)

Acquiring new skills:
As a new member of the TARAN team, you will be integrated into a research group with excellent prestige and deep knowledge of embedded systems. The TARAN research group can provide you with a more solid understanding and knowledge of computer architectures and hardware design. For instance, the host team has high-quality papers published using RISC-V-based processors and dedicated hardware designs, subjects that you will be able to learn much more about and increase your background in this area.

• • Prise en charge à 50 % des frais de transport en commun sur le trajet domicile-travail ou
    FMD.
  • Restauration subventionnée
  • Prise en charge partielle des frais de mutuelle
  • Possibilité de télétravail (à hauteur de 90 jours annuels) et d'aménagement du temps de travail

 rémunération mensuelle brute à partir de 2655 euros selon diplôme et expérience