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The memory hierarchy of HPC platforms keeps becoming even more complex. Now that all processors have multiple levels of caches, memory itself is changing with the advent of different technologies with different performance characteristics. Heterogeneous memories first appeared in HPC several years ago with the Intel Xeon Phi processor. Custom strategies were implemented to place bandwidth-sensitive data buffers on the appropriate memory. The emergence on non-volatile memory DIMMs (that may be used either as fast storage or as slow but high-capacity memory) brought similar questions. Moreover several ARM and x86 platforms are going to combine HBM and DRAM on the road to exascale, and the CXL technology is bringing new ways to connect additional memory targets to modern processors. There is a critical need for software stacks to learn portable ways to identify different kinds of memories, to abstract their characteristics in terms of performance, and to decide where to allocate which data buffer.

Heuristics for Heterogeneous Memory (H2M) is an ANR-DFG joint-project between the Inria TADaaM team in Bordeaux (France) and RWTH Aachen (Germany) to address these questions. The goal is to develop a hierarchy of programming abstractions to expose heterogeneous memory at different levels of detail and control, complemented by a set of required, vendor-neutral capabilities to
be provided by standards and intelligent runtime systems.

This engineer position is funded by the H2M ANR-DFG project (https://h2m.gitlabpages.inria.fr/).

The role of the engineer will be:
* Survey of new and upcoming heterogeneous memory hardware (HBM, NVM, CXL, etc)
* Deployment of software techniques to simulate heterogeneous memory (virtual machines, hardware features to limit bandwidth, etc)
* Analysis of the performance characteristics of heterogeneous platforms
* Development of the H2M software stack, e.g. memory allocation strategies
* Development of the hwloc library, e.g. exposing more information about heterogeneous memory
* Study of methods and tools to identify the sensitivity of data buffers and compute kernels to memory bandwidth or latency
* Evaluate the contributions with different applications on different hardware architectures

The engineer will develop these ideas in the software projects developed by the H2M project and the Inria TADaaM team. This notably includes the hwloc library for low-level hardware management and operating system interaction. Higher level ideas will be development as part of the H2M project in collaboration with the RWTH Aachen team, with the goal of proposing ideas to the OpenMP standard committee. Modifications of the LLVM compile and runtimes might be used as a way to identify sensitivity and apply placement heuristics.

The candidate will be in charge of implementing the ideas in collaboration with other members, as well as evaluating them with different applications on either real or simulated platforms.

Technical skills and level required:

• Basic knowledge of parallel architectures (multicore, NUMA, etc), operating systems and compilation techniques.
• C/C++ programming as well as some development tools (CMake, autotools, etc)
• Unix environment (shell, ssh, etc)

Languages:

• English mandatory, French appreciated.

The gross monthly salary will be between € 2652 and € 3039, depending on your qualifications and professional experience (before social security contributions and monthly withholding tax).